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ASIC Developer

Ericsson

Описание

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About this opportunity:

Design Verification Engineer – AI & Agentic Workflows
Austin, Texas
Design Verification Engineer

ASIC, SoC & FPGA Verification
Build the Verification Foundation for Next-Generation Custom Silicon
Ericsson Silicon is looking for an innovative, results-driven Design Verification Engineer to architect, verify, and scale the custom IPs, ASICs, SoCs, and FPGA-based platforms powering next-generation communications infrastructure and Layer 1 accelerators.
In this role, you won't just build traditional testbenches—you will pioneer and leverage AI-driven verification methodologies and agentic workflows to supercharge test generation, automate complex debug loops, and accelerate coverage closure. You will work closely with architects, RTL designers, emulation teams, and system engineers to identify issues early, reduce tapeout cycles, and deliver exceptionally high-quality custom silicon.
This is an opportunity to make a direct impact on complex designs spanning OSI Layer 1 Accelerators, custom baseband DSPs, AI/ML inference blocks, RISC-V/ARM cores, and high-speed multi-gigabit interfaces.

Обязанности

Define Verification Strategies: Spearhead verification plans, environments, and schedules for complex Layer 1 accelerator ASICs, SoCs, and FPGA platforms.
Architect Reusable UVM Environments: Build advanced, highly reusable UVM-based verification environments using SystemVerilog, integrated with LLM-assisted test generation and intelligent…

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